IC inductors that are known in the art generally comprise a spiral metal trace in a single device layer, or possibly two oppositely-wound spirals in a pair of layers. Because of the limitations of such designs, alternative types of IC inductors have been suggested in the patent literature.
For example, U.S. Patent Application Publication 2012/0319236 describes an inductor formed from a conductive path that includes intertwined conductive lines. There may be two, three, or more than three intertwined conductive lines in the conductive path. The conductive lines may be formed from conductive structures in the dielectric stack of an integrated circuit. The dielectric stack may include metal layers that include conductive traces and may include via layers that include vias for interconnecting the traces.
As another example, U.S. Pat. No. 8,344,479 describes IC inductors that are formed by interconnecting various metal layers in an integrated circuit with continuous vias. Using continuous vias is said to improve the Q factor over existing methods for high frequency applications.
Three-dimensional IC inductors are described, for example, in PCT International Publication WO 2013/101131. Such an inductor is formed in an IC die using conductive through-body-vias, which pass through the body of the die and contact one or more metal interconnect layers on the front side of the die and terminate on the back side of the die. In another embodiment, the through-body-vias may pass through a dielectric material disposed in a plug in the body of the die. In still another aspect, a three-dimensional inductor may include conductors formed of stacks of on chip metallization layers and conductive through-layer-vias disposed in insulation layers between metallization layers.